VHDL Modelling of a Bit Slice Arithmetic Logic Unit

The electronics industry experienced an explosion in the demand for personal computers , cellular telephones, and high speed data communication devices; vendors built products with increasingly greater functionality, higher performance, lower cost, lower power consumption, and smaller dimensions. The bottleneck for some vendors appeared to be the ability of designers to deal with the increasing complexity of designs.This situation fostered the need for widespread adoption of modern methodologies in design and test. Both high-density programmable logic devices ( PLD's ) and VHDL,became key elements in these ethodologies.VHDL is the acronym for VHSIC Hardware Design Language ( VHSIC is an acronym for Very High Speed Integrated Circuits ). As the name implies it is a hardware description language unlike other languages like C, C++, etc, which are all pure software languages. It is a hardware description tool essentially used to model a digital system. The digital system can be anything ranging from asimple gate device to large complex devices. Whatever be the device, it can be modeled at various levels of abstraction, ranging from the algorithm level to the gate level. It contains elements that can be used to describe the behavior or structure of a digital system; that is, the functionality of the device can be explicitly modeled.


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