VHDL Modelling of Glue Logic of
1553B Interface Board

VHDL is an acronym which stands for VHSIC Hardware Description Language.VHSIC is yet another acronym which stands for Very High Speed Integrated Circuits .VHDL is a high level language used for system and circuit design. This language supports various abstraction levels of design, including architecture-specific design. At the higher levels, this language can be used for system design without regard to a specific technology.
Here our efforts were towards developing a glue logic for the 1553B Interface Board using VHDL simulation. These modules have to be tested separately and evaluated and also confirm their compliance with the 1553B BUS standard before being integrated as the Avionics System. The PC/AT based MIL-STD 1553B interface board can be used as a standard test system for the module level test. The newly developed interface board can be integrated in the PC bus which guaranteed for 0 microsecond interword gap.Such Interface boards are used as standard test system for the module level test .Works view Office was the tool used to develop this project.


Labels : Engineering Seminar Topics, Technical Seminar Topics, General Seminar Topics, General Seminar Topics for English|Biology|Chemistry|Physics, General Topics for Group Discussion, PPT Presentation Topics, PPT Topics, Speech Topics or Ideas, Seminars For You, IEEE Seminar Topics, Seminar Ideas, PPTs and Reports ,Best Seminar Topics List, Current Seminar Topics ,Thesis Topics or Ideas ,Research Topics or Ideas , Seminar List, Engineering Seminar Reports

copyright © 2006 V2 Computers E-mail :-