The European Space Agency (ESA) has programmes underway to place Satellites carrying
optical terminals in GEO orbit within the next decade. The first is the ARTEMIS
technology demonstration satellite which carries both microwave and SILEX (Semiconductor
Laser Intro satellite Link Experiment) optical interorbit communications terminal.
SILEX employs direct detection and GaAIAs diode laser technology; the optical
antenna is a 25cm diameter reflecting telescope.
SILEX GEO terminal is capable of receiving data modulated on to an incoming laser
beam at a bit rate of 50 Mbps and is equipped with a high power beacon for initial
link acquisition together with a low divergence (and unmodulated) beam which is
tracked by the communicating partner. ARTEMIS will be followed by the operational
European data relay system (EDRS) which is planned to have data relay Satellites
(DRS). These will also carry SILEX optical data relay terminals.
Once these elements of Europe's space Infrastructure are
in place, these will be a need for optical communications terminals on LEO satellites
which are capable of transmitting data to the GEO terminals. A wide range of LEO
space craft is expected to fly within the next decade including earth observation
and science, manned and military reconnaissance system.
The LEO terminal is referred to as a user terminal since it enables real time
transfer of LEO instrument data back to the ground to a user access to the DRS
s LEO instruments generate data over a range of bit rates extending of Mbps depending
upon the function of the instrument. A significant proportion have data rates
falling in the region around and below 2 Mbps. and the data would normally be
transmitted via an S-brand microwave IOL
initiated a development programme in 1992 for LEO optical IOL terminal targeted
at the segment of the user community. This is known as SMALL OPTICAL USER TERMINALS
(SOUT) with features of low mass, small size and compatibility with SILEX.
programme is in two phases. Phase I was to produce a terminal flight configuration
and perform detailed subsystem design and modelling. Phase 2 which started in
september 1993 is to build an elegant bread board of the complete terminal.
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