The Idea Of Direct Memory Access
By providing circuitry to generate addresses
and memory control signals independently of the processor we see that it is possible
to improve performance considerably. All that is necessary is to provide a signal
to tell the processor to remove itself from the bus so there is no contention
on the memory control, address, or data lines.
is the entire concept behind direct memory access (DMA). To complete our picture,
it is important to note that there are actually several ways that DMA can be done.
In particular, there are three common choices:-
mode DMA :- In burst mode the DMA controller transfers an entire block of
data without interruption. During the time of the transfer, the DMA controller
retains complete control of the processor's bus.
Stealing :- If it is desirable to let the processor do some processing while
the DMA controller transfers data cycle stealing can be used. In this case, the
DMA controller will periodically request use of the bus until all of its data
are transferred. This slows down the processor and the DMA transfer.
DMA :- It is possible for the DMA controller to monitor the internal status
of the processor. In those cases where the processor does not need bus access
(internal data moves and such) the DMA controller uses the bus. This slows down
the DMA transfer, but not the processor.
proper transfer mode to use is determined by the system requirements.
Burst mode DMA is a typical way of handling bulk data
transfers (like the idea we described for our video controller). The other modes
operates in a similar fashion. For a burst mode transfer:-
The processor loads the DMA controller with the start address of the destination
in memory and the number of words to transfer.
When the device delivering or requesting data is ready, the DMA controller is
signaled. In turn, the
controller signals the processor that a DMA transfer
3) The processor acknowledges the
request, finishes its current instruction, and then floats the address, control,
and data buses.
4) The DMA controller now provides
address and control signals to memory while the device requesting the transfer
supplies or receives the data.
5) Once the
transfer is complete, the DMA signals the processsor to resume its normal operation.
signaling of the 8088 processor is done through the hold and holda lines. When
the DMA controller wants the bus, it signals the processor by raising hold. After
the processor completes the current
instruction, it tri-states the data, address,
and control lines, and raises hold acknowledge (holda). Once the DMA controller
sees holda, it knows it is free to use the bus.
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