The L18 flash memory device provides read-while-write and read-while-erase capability
with density upgrades through 256-Mbit. This family of devices provides high performance
at low voltage on a 16-bit data bus. Individually erasable memory blocks are sized
for optimum code and data storage. Each device density contains one parameter
partition and several main partitions. The flash memory array is grouped into
multiple 8-Mbit partitions. By dividing the flash memory into partitions, program
or erase operations can take place at the same time as read operations.
Although each partition has write, erase and burst read capabilities, simultaneous
operation is limited to write or erase in one partition while other partitions
are in read mode. The L18 flash memory device allows burst reads that cross partition
boundaries. User application code is responsible for ensuring that burst reads
don't cross into a partition that is programming or erasing. Upon initial power
up or return from reset, the device defaults to asynchronous page-mode read. Configuring
the Read Configuration Register enables synchronous burst-mode reads. In synchronous
burst mode, output data is synchronized with a user-supplied clock signal. A WAIT
signal provides easy CPU-to-flash memory synchronization. In addition to the enhanced
architecture and interface, the L18 flash memory device incorporates technology
that enables fast factory program and erase operations. Designed for low-voltage
systems, the L18 flash memory device supports read operations with VCC at 1.8
volt, and erase and program operations with VPP at 1.8 V or 9.0 V
In order to enable computers to work faster, there are several types of memory
available today. Within a single computer there are more than one type of memory.
RAM family includes two important memory devices: static RAM (SRAM) and dynamic
RAM (DRAM). The primary difference between them is the lifetime of the data they
store. SRAM retains its contents as long as electrical power is applied to the
chip. If the power is turned off or lost temporarily, its contents will be lost
forever. DRAM, on the other hand, has an extremely short data lifetime-typically
about four milliseconds. This is true even when power is applied constantly.
In short, SRAM has all the properties of the memory you think of when you hear
the word RAM. Compared to that, DRAM seems useless. However, a simple piece of
hardware called a DRAM controller can be used to make DRAM behave more like SRAM.
The job of the DRAM controller is to periodically refresh the data stored in the
DRAM. By refreshing the data before it expires, the contents of memory can be
kept alive for as long as they are needed. So DRAM is also as useful as SRAM.
When deciding which type of RAM to use, a system designer must consider access
time and cost. SRAM devices offer extremely fast access times (approximately four
times faster than DRAM) but are much more expensive to produce. Generally, SRAM
is used only where access speed is extremely important. A lower cost-per-byte
makes DRAM attractive whenever large amounts of RAM are required. Many embedded
systems include both types: a small block of SRAM (a few kilobytes) along a critical
data path and a much larger block of dynamic random access memory (perhaps even
in Megabytes) for everything else.
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